Multilayer Ceramic Capacitors (MLCC) – Automated Visual Inspection with AI

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Zero-defect MLCCs at production speed

Intelgic’s machine vision + AI platform automates inline and offline inspection of MLCCs—from green tape to sintered chips, singulation, plating, and tape-and-reel—detecting sub-10 µm defects with full traceability.

Micron-level defect capture
Stable yield & SPC
Digital Quality Certificates (DQC)

Why MLCC Inspection Is Hard

MLCCs are tiny, brittle, and process-sensitive. Cosmetic flaws often correlate with latent reliability risks, while the smallest handling nick can become a catastrophic crack after reflow.

Scale & Density

Chips as small as 0201/0402 (and smaller), millions per day.

Brittleness

Micro-chipping and micro-cracks are hard to see, easy to miss.

Surface Variability

Matte vs. glossy end terminations, plating tone changes.

Process variability

Green tape punching, stacking, lamination, dicing, tumble deburr, plating, marking, and packaging each introduce unique defects.

Throughput pressure

Inspection must match high-speed singulation and tape-and-reel rates without false rejects.

Common Defects

Body / Ceramic

  • Corner/edge chipping, micro-cracks, delamination indications, voids/pinholes, lamination lines, warpage/bow
  • Contamination (binder residue, foreign particles), glaze/over-firing surface anomalies
  • Holes on the surface

End Terminations / Plating

  • Missing/short plating, uneven wrap, plating bleed, blisters, porosity, burrs
  • Solderability risks (oxidation tone cues, wetting inhibitors—visual cues)

Dimensional / Handling

  • Out-of-spec L/W/T (length/width/thickness), skew, bevel mismatch, body tilt
  • Leadframe dents/marks (for specific packages), singulation burrs

Marking & Packaging

  • Laser/ink mark misalignment, missing mark, smudges
  • Tape-and-reel pocket contamination, wrong orientation (polarity mark families), count errors

Note: Electrical parameters (capacitance/ESR/DF/IR) are typically verified by E-test/ATE. Intelgic can interface with those stations and correlate visual-to-electrical outcomes for richer SPC.

Intelgic Inspection Cells for MLCC

Bare Chip / Post-Singulation (Tray/Conveyor)

  • Telecentric imaging (1–3 µm/px) for true-to-scale L/W/T and bevel edges
  • Darkfield + coaxial lighting to reveal micro-cracks, edge chips, plating texture
  • Dual-side imaging (flip/convey) for complete wrap inspection

Tape-and-Reel (TnR) Inline

  • High-speed area-scan over pockets without slowing feed rate
  • Orientation & presence check, count verification, pocket contamination detection
  • Mark verification (OCR/OCV) for marked families

Green Tape / Pre-Sinter Visual (optional)

  • Early-stage defect screening (pinhole, punching burrs, lamination mis-registry)
  • Prevents value-added waste before firing

Imaging & Optics Stack

Cameras

20–65 MP industrial sensors, global shutter; optional line-scan for continuous web

Lenses

Telecentric for metrology; long-WD macro for TnR; motorized focus for thickness steps

Lighting Geometry

  • • Coaxial brightfield for flat surfaces
  • • Low-angle darkfield for edges
  • • Dome/diffuse to suppress hot spots
  • • Polarization to tame reflections

Precision Mechanics

Vibration-isolated stages, fiducial-based alignment, flip modules for dual-side viewing

Live Vision AI for MLCC (Intelgic)

Intelligent defect detection and classification powered by machine learning

AI Vision System

Anomaly Detection (Good-Only):

Learn “golden appearance” of ceramic and plating; flag novel defects without exhaustive labeling.

Supervised Models

Classify chips (OK, minor chip, severe chip, crack, plating short, porosity, contamination, etc.).

Pixel-level Segmentation

Measure crack length/edge chip area in µm; compute wrap/coverage metrics.

3D-aware cues (optional)

Multi-angle reflectance or height proxies for subtle bevel defects.

Adaptive Recipes

One station handles multiple sizes/series—swap recipes in seconds; automatic scale re-calibration with a grid target.

Decisions, Metrics & Rules (Examples)

Dimensions

L/W/T tolerance in µm; bevel min/max; wrap length %

Chipping/Cracks

Max chip area (µm²) per edge; crack length/angle thresholds

Plating Quality

Minimum coverage; maximum porosity count/area; blister detection confidence

Cosmetics

Particle size/contrast thresholds; stain/mark acceptance windows

Grading

OK / Rework / Reject with IPC-like severity bands (customizable)

All measurements are logged per serial/lot and bound to DQC (Digital Quality Certificate).

Inline Performance & Integration

Throughput

Tuned to match singulation and TnR lines (multi-camera parallelization supported)

Latency

: Real-time PASS/FAIL with reject chute, marker, or diverter outputs

Connectivity

OPC-UA / MQTT / REST / SQL; barcode/QR lot binding; ATE & MES/ERP hooks

User Roles

Operator, QE, Admin; recipe version control; audit trail

Analytics & Traceability

Analytics Dashboard

Per-chip Record

Images, masks, metrics, decision, recipe version, operator/line ID, timestamps

Interactive Dashboards

Pareto of top defects, FP/FR trend, heatmaps, SPC charts, OEE

Root-cause Correlation

Link visual defects to upstream steps (lamination, sinter, plate, pack)

Digital Quality Certificate

Digitally signed certificate for every shipped reel/tray

Benefits at a Glance

Sub-10µm Sensitivity

Detect cracks & chips that drive field failures with unprecedented precision

Lower False Rejects

Learned normal modeling and robust lighting reduce false positive rates

Fewer Escapes

Reduce warranty exposure and improve overall cost of quality

Faster Changeovers

Handle multiple sizes/series with quick recipe switching

Complete Traceability

Digital Quality Certificate (DQC) for compliance and customer audits

Frequently Asked Questions

For internal electrode faults, X-ray is typical. Intelgic focuses on external visual and metrology; we can integrate X-ray results into the same dashboard/DQC if available.

Yes—telecentric optics + recipe scaling and auto-calibration support a wide range of sizes.

Stage & scale calibration with traceable targets; periodic checks; recipe-bound scale factors; GR&R reporting.

Cross-polarized coaxial + darkfield blends and exposure bracketing; AI trained across illumination variants.

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